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  2. Abstract Generator - Custom IC Design - Cadence Technology Forums...

    community.cadence.com/.../f/custom-ic-design/15139/abstract-generator

    Hi Affaq, In 5.141 teh best you can have is teh Launch -> Asbstract Editor then click on 'Abstract' menu and choose Generate Abstract you need complete a form then click on Run and it will bring teh Abstract Generator and you still need to complete all teh different form for the abstrcat generation. What type of info should you abstract contain ...

  3. Abstract Generator : tech file and origin in LEF file - Custom IC...

    community.cadence.com/.../abstract-generator-tech-file-and-origin-in-lef-file

    I am generating a LEF view with Abstract Generator Tool, from a layout.oa, for a simple inverter cell (up to M1 layer). I have the following lines in the generated LEF view : MACRO test_iv_LayoutToCEL. CLASS CORE ; ORIGIN 0.18 0.24 ; FOREIGN test_iv_LayoutToCEL -0.18 -0.24 ; Actually, I would like to have ORIGIN 0 0 ; How should I do ?

  4. Pin warnings in abstract generator - Custom IC Design - Cadence...

    community.cadence.com/.../15487/pin-warnings-in-abstract-generator

    Hi Affaq Since you have migrated the design to openAccess, let's keep the environment constant and debug using abstract generator 614. Would you please redo the steps and upload the following as file attachments (please do not cut and paste): a. abstract.log file b. abstract options file (File->Export->Options) Open up your layout and check ...

  5. abstract generation - Custom IC Design - Cadence Technology...

    community.cadence.com/.../f/custom-ic-design/17160/abstract-generation

    In 6.1, the abstract generator can directly read the layout views created by 6.1.x Virtuoso. But in 5.1, Abstract generator does not read the 5.1.x Virtuoso layout directly & therefore does not directly read the pins created from 5.1.x Virtuoso. Instead it makes use of text attributes & overlapping shapes to identify pins & pin locations.

  6. Abstract Generator - Issue in the "Pins" step of the workflow.

    community.cadence.com/cadence_technology_forums/f/custom-ic-design/36511/...

    I would like to know how the Standalone Abstract Generator recognize Cadence layers from layouts views to extract pins. I'm trying to set "Map text labels to pins" with the pin layers in the "Pins" step, but the tool doesn't recognize them.

  7. Abstract Generator : Memory instance ABSTRACT&LEF views...

    community.cadence.com/cadence_technology_forums/f/custom-ic-design/29849/...

    WARNING (ABS-325): Cell Inst_cellName: Failed to set the property because the cell is either invalid or does not contain any of the valid views.Abstract Generator can set properties only on valid views, such as Pins,Extract,Abstract, that it has created.

  8. abstract generator - are there absSetBinOption function...

    community.cadence.com/cadence_technology_forums/f/custom-ic-design/59205/...

    but in the abstract generator i then saw that this is a minimum value, so it is not what i was looking for. since we have some more of such issues (special requests), it would be great to have a description of all the existing absSetBinOption functions.

  9. Abstract Generator: Terminals not accessible, off-grid pins

    community.cadence.com/cadence_technology_forums/f/custom-ic-design/35074/...

    abstract generation for a simple inverter layout prompts some warnings about terminal inaccessability and off-grid pins: INFO (ABS-19026): Generating detailed blockages for layer VV INFO (ABS-19026): Generating detailed blockages for layer LB *WARNING* (ABS-15061): Cell INV_X1: The Terminal gnds pin has no accessible pins on the Metal1-Metal2 ...

  10. Abstract Generator + Encounter and DRC Errors - Custom IC Design...

    community.cadence.com/.../30654/abstract-generator-encounter-and-drc-errors

    and letting abstract generator put the required annotations in the layout view. If I add 'layout' to the abstract views used by Encounter, it is able to place and route the cells as before, but this time Encounter doesn't complain about shorts (even though it is connecting to the nets on METAL2 and METAL3 as it was before) and detail route finishes MUCH more quickly.

  11. Abstract Generator: How to configure to tool to extract layer...

    community.cadence.com/cadence_technology_forums/f/custom-ic-skill/30870/...

    If you specify only a layer name instead of a layer-purpose pair in the Geometry Specification column, the abstract generator considers all the purposes on that layer except the Ignored Purpose(s). So, either on the form, or in the .abstractrc file you can specify the layer-purpose rather than just the layer.